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| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | +/* |
| 3 | + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. |
| 4 | + */ |
| 5 | +#include "rv1106-amp.dtsi" |
| 6 | + |
| 7 | +/ { |
| 8 | + acodec_sound: acodec-sound { |
| 9 | + compatible = "simple-audio-card"; |
| 10 | + simple-audio-card,name = "rv-acodec"; |
| 11 | + simple-audio-card,format = "i2s"; |
| 12 | + simple-audio-card,mclk-fs = <256>; |
| 13 | + simple-audio-card,cpu { |
| 14 | + sound-dai = <&i2s0_8ch>; |
| 15 | + }; |
| 16 | + simple-audio-card,codec { |
| 17 | + sound-dai = <&acodec>; |
| 18 | + }; |
| 19 | + }; |
| 20 | + |
| 21 | + vcc_1v8: vcc-1v8 { |
| 22 | + compatible = "regulator-fixed"; |
| 23 | + regulator-name = "vcc_1v8"; |
| 24 | + regulator-always-on; |
| 25 | + regulator-boot-on; |
| 26 | + regulator-min-microvolt = <1800000>; |
| 27 | + regulator-max-microvolt = <1800000>; |
| 28 | + }; |
| 29 | + |
| 30 | + vcc_3v3: vcc-3v3 { |
| 31 | + compatible = "regulator-fixed"; |
| 32 | + regulator-name = "vcc_3v3"; |
| 33 | + regulator-always-on; |
| 34 | + regulator-boot-on; |
| 35 | + regulator-min-microvolt = <3300000>; |
| 36 | + regulator-max-microvolt = <3300000>; |
| 37 | + }; |
| 38 | + |
| 39 | + vdd_arm: vdd-arm { |
| 40 | + compatible = "regulator-fixed"; |
| 41 | + regulator-name = "vdd_arm"; |
| 42 | + regulator-min-microvolt = <800000>; |
| 43 | + regulator-max-microvolt = <1000000>; |
| 44 | + regulator-init-microvolt = <900000>; |
| 45 | + regulator-always-on; |
| 46 | + regulator-boot-on; |
| 47 | + }; |
| 48 | + leds: leds { |
| 49 | + compatible = "gpio-leds"; |
| 50 | + work_led: work{ |
| 51 | + gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; |
| 52 | + linux,default-trigger = "activity"; |
| 53 | + default-state = "on"; |
| 54 | + }; |
| 55 | + }; |
| 56 | + |
| 57 | + // DHT11 |
| 58 | + dht11_sensor { |
| 59 | + compatible = "dht11"; |
| 60 | + pinctrl-names = "default"; |
| 61 | + pinctrl-0 = <&gpio1_pc7>; |
| 62 | + |
| 63 | + dht11@1 { |
| 64 | + gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; |
| 65 | + label = "dht11"; |
| 66 | + linux,default-trigger = "humidity"; |
| 67 | + }; |
| 68 | + }; |
| 69 | + |
| 70 | +}; |
| 71 | + |
| 72 | +/***************************** AUDIO ********************************/ |
| 73 | +&i2s0_8ch { |
| 74 | + #sound-dai-cells = <0>; |
| 75 | + status = "okay"; |
| 76 | +}; |
| 77 | + |
| 78 | +&acodec { |
| 79 | + #sound-dai-cells = <0>; |
| 80 | + pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; |
| 81 | + status = "okay"; |
| 82 | +}; |
| 83 | +/***************************** CPU ********************************/ |
| 84 | +&cpu0 { |
| 85 | + cpu-supply = <&vdd_arm>; |
| 86 | +}; |
| 87 | + |
| 88 | +/***************************** ADC ********************************/ |
| 89 | +&saradc { |
| 90 | + status = "okay"; |
| 91 | + vref-supply = <&vcc_1v8>; |
| 92 | +}; |
| 93 | + |
| 94 | +&tsadc { |
| 95 | + status = "okay"; |
| 96 | +}; |
| 97 | + |
| 98 | +/***************************** CSI ********************************/ |
| 99 | +&csi2_dphy_hw { |
| 100 | + status = "okay"; |
| 101 | +}; |
| 102 | + |
| 103 | +&csi2_dphy0 { |
| 104 | + status = "okay"; |
| 105 | + |
| 106 | + ports { |
| 107 | + #address-cells = <1>; |
| 108 | + #size-cells = <0>; |
| 109 | + |
| 110 | + port@0 { |
| 111 | + reg = <0>; |
| 112 | + #address-cells = <1>; |
| 113 | + #size-cells = <0>; |
| 114 | + |
| 115 | + csi_dphy_input0: endpoint@0 { |
| 116 | + reg = <0>; |
| 117 | + remote-endpoint = <&sc3336_out>; |
| 118 | + data-lanes = <1 2>; |
| 119 | + }; |
| 120 | + |
| 121 | + csi_dphy_input1: endpoint@1 { |
| 122 | + reg = <1>; |
| 123 | + remote-endpoint = <&mis5001_out>; |
| 124 | + data-lanes = <1 2>; |
| 125 | + }; |
| 126 | + }; |
| 127 | + |
| 128 | + port@1 { |
| 129 | + reg = <1>; |
| 130 | + #address-cells = <1>; |
| 131 | + #size-cells = <0>; |
| 132 | + |
| 133 | + csi_dphy_output: endpoint@0 { |
| 134 | + reg = <0>; |
| 135 | + remote-endpoint = <&mipi_csi2_input>; |
| 136 | + }; |
| 137 | + }; |
| 138 | + }; |
| 139 | +}; |
| 140 | + |
| 141 | +&i2c4 { |
| 142 | + status = "okay"; |
| 143 | + clock-frequency = <400000>; |
| 144 | + |
| 145 | + sc3336: sc3336@30 { |
| 146 | + compatible = "smartsens,sc3336"; |
| 147 | + status = "okay"; |
| 148 | + reg = <0x30>; |
| 149 | + clocks = <&cru MCLK_REF_MIPI0>; |
| 150 | + clock-names = "xvclk"; |
| 151 | + pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; |
| 152 | + pinctrl-names = "default"; |
| 153 | + pinctrl-0 = <&mipi_refclk_out0>; |
| 154 | + rockchip,camera-module-index = <0>; |
| 155 | + rockchip,camera-module-facing = "back"; |
| 156 | + rockchip,camera-module-name = "CMK-OT2119-PC1"; |
| 157 | + rockchip,camera-module-lens-name = "30IRC-F16"; |
| 158 | + port { |
| 159 | + sc3336_out: endpoint { |
| 160 | + remote-endpoint = <&csi_dphy_input0>; |
| 161 | + data-lanes = <1 2>; |
| 162 | + }; |
| 163 | + }; |
| 164 | + }; |
| 165 | + |
| 166 | + mis5001: mis5001@31 { |
| 167 | + compatible = "imagedesign,mis5001"; |
| 168 | + status = "okay"; |
| 169 | + reg = <0x31>; |
| 170 | + clocks = <&cru MCLK_REF_MIPI0>; |
| 171 | + clock-names = "xvclk"; |
| 172 | + reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; |
| 173 | + pinctrl-names = "default"; |
| 174 | + pinctrl-0 = <&mipi_refclk_out0>; |
| 175 | + rockchip,camera-module-index = <0>; |
| 176 | + rockchip,camera-module-facing = "back"; |
| 177 | + rockchip,camera-module-name = "CMK-OT2115-PC1"; |
| 178 | + rockchip,camera-module-lens-name = "30IRC-F16"; |
| 179 | + port { |
| 180 | + mis5001_out: endpoint { |
| 181 | + remote-endpoint = <&csi_dphy_input1>; |
| 182 | + data-lanes = <1 2>; |
| 183 | + }; |
| 184 | + }; |
| 185 | + }; |
| 186 | +}; |
| 187 | + |
| 188 | +&mipi0_csi2 { |
| 189 | + status = "okay"; |
| 190 | + |
| 191 | + ports { |
| 192 | + #address-cells = <1>; |
| 193 | + #size-cells = <0>; |
| 194 | + |
| 195 | + port@0 { |
| 196 | + reg = <0>; |
| 197 | + #address-cells = <1>; |
| 198 | + #size-cells = <0>; |
| 199 | + |
| 200 | + mipi_csi2_input: endpoint@1 { |
| 201 | + reg = <1>; |
| 202 | + remote-endpoint = <&csi_dphy_output>; |
| 203 | + }; |
| 204 | + }; |
| 205 | + |
| 206 | + port@1 { |
| 207 | + reg = <1>; |
| 208 | + #address-cells = <1>; |
| 209 | + #size-cells = <0>; |
| 210 | + |
| 211 | + mipi_csi2_output: endpoint@0 { |
| 212 | + reg = <0>; |
| 213 | + remote-endpoint = <&cif_mipi_in>; |
| 214 | + }; |
| 215 | + }; |
| 216 | + }; |
| 217 | +}; |
| 218 | + |
| 219 | +&rkcif { |
| 220 | + status = "okay"; |
| 221 | +}; |
| 222 | + |
| 223 | +&rkcif_mipi_lvds { |
| 224 | + status = "okay"; |
| 225 | + |
| 226 | + pinctrl-names = "default"; |
| 227 | + pinctrl-0 = <&mipi_pins>; |
| 228 | + port { |
| 229 | + /* MIPI CSI-2 endpoint */ |
| 230 | + cif_mipi_in: endpoint { |
| 231 | + remote-endpoint = <&mipi_csi2_output>; |
| 232 | + }; |
| 233 | + }; |
| 234 | +}; |
| 235 | + |
| 236 | +&rkcif_mipi_lvds_sditf { |
| 237 | + status = "okay"; |
| 238 | + |
| 239 | + port { |
| 240 | + /* MIPI CSI-2 endpoint */ |
| 241 | + mipi_lvds_sditf: endpoint { |
| 242 | + remote-endpoint = <&isp_in>; |
| 243 | + }; |
| 244 | + }; |
| 245 | +}; |
| 246 | + |
| 247 | +&rkisp { |
| 248 | + status = "okay"; |
| 249 | +}; |
| 250 | + |
| 251 | +&rkisp_vir0 { |
| 252 | + status = "okay"; |
| 253 | + |
| 254 | + port@0 { |
| 255 | + isp_in: endpoint { |
| 256 | + remote-endpoint = <&mipi_lvds_sditf>; |
| 257 | + }; |
| 258 | + }; |
| 259 | +}; |
| 260 | + |
| 261 | + |
| 262 | +/*****************************PINCTRL********************************/ |
| 263 | +// SPI |
| 264 | +&spi0 { |
| 265 | + pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>; |
| 266 | + #address-cells = <1>; |
| 267 | + #size-cells = <0>; |
| 268 | + spidev@0 { |
| 269 | + compatible = "rockchip,spidev"; |
| 270 | + spi-max-frequency = <50000000>; |
| 271 | + reg = <0>; |
| 272 | + }; |
| 273 | + |
| 274 | + fbtft@0 { |
| 275 | + compatible = "sitronix,st7789v"; |
| 276 | + reg = <0>; |
| 277 | + spi-max-frequency = <20000000>; |
| 278 | + fps = <30>; |
| 279 | + buswidth = <8>; |
| 280 | + debug = <0x7>; |
| 281 | + led-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;//BL |
| 282 | + dc-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;//DC |
| 283 | + reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;//RES |
| 284 | + }; |
| 285 | +}; |
| 286 | +// I2C |
| 287 | +&i2c0 { |
| 288 | + pinctrl-0 = <&i2c0m2_xfer>; |
| 289 | +}; |
| 290 | + |
| 291 | +&i2c1 { |
| 292 | + pinctrl-0 = <&i2c1m1_xfer>; |
| 293 | +}; |
| 294 | + |
| 295 | +&i2c3 { |
| 296 | + pinctrl-0 = <&i2c3m1_xfer &i2c3m0_xfer>; |
| 297 | +}; |
| 298 | + |
| 299 | +&i2c4 { |
| 300 | + pinctrl-names = "default", "conifg"; |
| 301 | + pinctrl-0 = <&i2c4m2_xfer>; |
| 302 | + pinctrl-1 = <&i2c4m0_xfer>; |
| 303 | +}; |
| 304 | + |
| 305 | +// UART |
| 306 | +&uart0 { |
| 307 | + pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>; |
| 308 | +}; |
| 309 | +&uart1 { |
| 310 | + pinctrl-0 = <&uart1m1_xfer>; |
| 311 | +}; |
| 312 | +&uart3 { |
| 313 | + pinctrl-0 = <&uart3m1_xfer>; |
| 314 | +}; |
| 315 | +&uart4 { |
| 316 | + pinctrl-0 = <&uart4m1_xfer>; |
| 317 | +}; |
| 318 | +&uart5 { |
| 319 | + pinctrl-0 = <&uart5m0_xfer>; |
| 320 | +}; |
| 321 | + |
| 322 | +// PWM |
| 323 | +&pwm0 { |
| 324 | + pinctrl-0 = <&pwm0m1_pins>; |
| 325 | +}; |
| 326 | +&pwm2 { |
| 327 | + pinctrl-0 = <&pwm2m2_pins>; |
| 328 | +}; |
| 329 | +&pwm3 { |
| 330 | + pinctrl-0 = <&pwm3m2_pins>; |
| 331 | +}; |
| 332 | +&pwm4 { |
| 333 | + pinctrl-0 = <&pwm4m2_pins>; |
| 334 | +}; |
| 335 | +&pwm5 { |
| 336 | + pinctrl-0 = <&pwm5m1_pins &pwm5m2_pins>; |
| 337 | +}; |
| 338 | +&pwm6 { |
| 339 | + pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>; |
| 340 | +}; |
| 341 | +&pwm8 { |
| 342 | + pinctrl-0 = <&pwm8m1_pins>; |
| 343 | +}; |
| 344 | +&pwm9 { |
| 345 | + pinctrl-0 = <&pwm9m1_pins>; |
| 346 | +}; |
| 347 | +&pwm10 { |
| 348 | + pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>; |
| 349 | +}; |
| 350 | +&pwm11 { |
| 351 | + pinctrl-0 = <&pwm11m1_pins &pwm11m2_pins>; |
| 352 | +}; |
| 353 | + |
| 354 | +&pinctrl { |
| 355 | + spi0 { |
| 356 | + spi0m0_clk: spi0m0-clk { |
| 357 | + rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>; |
| 358 | + }; |
| 359 | + spi0m0_mosi: spi0m0-mosi { |
| 360 | + rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>; |
| 361 | + }; |
| 362 | + spi0m0_miso: spi0m0-miso { |
| 363 | + rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>; |
| 364 | + }; |
| 365 | + spi0m0_cs0: spi0m0-cs0 { |
| 366 | + rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>; |
| 367 | + }; |
| 368 | + }; |
| 369 | + |
| 370 | + gpio1-pc7 { |
| 371 | + gpio1_pc7: gpio1-pc7 { |
| 372 | + rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; |
| 373 | + }; |
| 374 | + }; |
| 375 | +}; |
| 376 | + |
| 377 | + |
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