#797 enhance VSG formatting command and error logging

[gmartina]

enhance VSG formatting command and error logging.
fix #797

correct vhdl:
The code has been formatted successfully.

vhdl with format error:

Error format code.vsg  -p 2 --fix -f /tmp/f-2025914-6811-1k11zym.lbleFormatter error details: VSG failed due to VHDL syntax error: Error while processing /tmp/f-2025914-6811-1k11zym.lble: 
Error: Unexpected token detected while parsing architecture_body @ Line 30, Column 1 in file None
       Expecting : end
       Found     : half_adderError location: Line 30, Column 1Expected: 'end', Found: 'half_adder'Failed to process file: /tmp/f-2025914-6811-1k11zym.lble